Today's material of choice for 10 Gbit/s fiber-optic communications is GaAs. But as telecom vendors ramp up to 40 Gbit/s, microelectronics chip makers are turning to InP to give their chips the required extra speed. Deborah Clark, a III-V process engineer at Nortel Networks of Canada says that a shift from GaAs to InP-based integrated circuits is critical in order to realize these higher transmission rates.

"The best ft and fmax for high-speed GaAs [chips] in production [today] are 110 GHz," she says. "There may be higher speed GaAs-integrated circuits in the literature, but we must move from development to production. We need better than 150 GHz for 40 Gbit/s systems, hence [we have a need for] InGaAs/InP and GaAsSb/InP HBTs."

However, speed is not the only factor that must be taken into account when producing high-performance integrated circuits, especially if you are a microelectronics chip maker. Chip processing is largely performed at the wafer level, so an easy way to keep costs down and realize economies of scale is to build more chips on a larger wafer. To meet this need, substrate makers are now focusing on the development of semi-insulating 4 inch InP, rather than the more established 2 and 3 inch single-crystal boules.

As with past advances in wafer manufacturing, the move towards 4 inch InP wafers has its problems. At last year's GaAs IC Symposium, Clark presented a paper entitled "Evaluation of 4 inch InP(Fe) substrates for the production of HBTs". According to Clark, Nortel Networks wanted to compare the crystal quality of semi-insulating substrates that had been grown by either the liquid encapsulated Czochralski (LEC) method or the vertical gradient freeze (VGF) technique.

Using a range of techniques including high-resolution scanning photoluminescence and asymmetric crystal topography, Clark characterized the wafers for surface defects. Typical defects included an uneven distribution of iron - the dopant added to InP to make it semi-insulating - as well as dislocations, slip, polycrystallinity, long-range strain and twinning. Overall wafer properties such as wafer flatness were also investigated.

Growing pains

Clark discovered that the characteristics of the wafers she studied varied depending on the method by which they were grown. For example, 4 inch wafers that were grown by LEC tended to suffer from high concentrations of defects, increasing from the seed or tail end of the boule. In contrast, defect densities were lower in the VGF-grown wafers.

These defects typically stem from an uneven iron-dopant distribution, a problem that plagues any wafer maker regardless of the growth technique, and leads to dislocations clustering around localized regions of reduced iron concentration. Clark believes that the higher thermal gradients which are used in LEC growth enhance this effect in these boules.

As well as controlling the dopant distribution, wafer makers also have to stop the iron segregating out of solution to form iron precipitates that can damage a wafer surface during polishing. Clark noticed this effect in both the LEC-grown and VGF-grown wafers.

From her studies, Clark says that of the other defects, wafers grown via LEC tend to suffer more from long-range strain and slip while wafers grown via VGF can exhibit severe twinning. Neither, however, encountered significant problems with polycrystallinity and all the manufacturers have recently improved wafer flatness.

To conclude her work Clark says that the crystal quality of 4 inch InP(Fe) wafers grown by VGF was comparable to smaller diameter InP(Fe) and 4 inch GaAs substrates also grown by VGF. On the other hand, for 4 inch InP(Fe) grown by LEC techniques, the defects were not as well controlled as smaller diameter InP(Fe) substrates or 4 inch GaAs substrates grown by the same technique.

Comparing growth techniques

Ask Clark whether she would rather use wafers grown by LEC or VGF and her answer is: "We haven't done enough work on InP to say that one growth technique is better than another, but the analytical data supports the conclusion that VGF is best. To date, Nortel Networks has only used VGF wafers for the growth of InP HBTs."

LEC is still a clear contender, however, and Clark says that although LEC boule manufacturers may have initially been slow to invest in 4 inch semi-insulating InP wafers, they have since developed boule and wafer annealing that gives a better dopant uniformity and fewer defects. One LEC boule manufacturer that would certainly agree with Clark on this point is the Japanese company Nikko Materials.

Nikko Materials is the InP and CdZnTe wafer-making arm of Japan Energy Corporation. Presently supplying 2 and 3 inch semi-insulating InP wafers at volume production levels, the company is already taking orders for 4 inch wafers at limited production volumes. Other companies that have been supplying small volumes of 4 inch semi-insulating LEC-grown wafers are Sumitomo Electric of Japan and US-based M/A-COM.

Kurt Williams, product manager of Nikko Materials USA attributes the company's 4 inch wafer progress to its ability to deliver high quality and reproducible wafers at the right time, rather than rushing lower quality wafers to market. "InP is a difficult material to work with, and producing the 4 inch wafers has been a challenge," he explained. "But we have taken the time to refine the quality of our 4 inch wafers and customer feedback shows that our timing has paid off." Indeed the company has just received qualification for its wafers from one of its customers, Velocium, a leading InP IC manufacturer.

Industry shift

Nikko Materials first started work on 4 inch InP wafers last year in response to what was seen as a fiber-optic industry move towards InP devices for next-generation ICs. Williams believes that GaAs devices are now reaching their limits and says that his company has seen a sharp increase in demand for semi-insulating InP wafers. "In the near future, I'm guessing at two to five years, we will see the manufacture of semi-insulating InP wafers at volume production levels," he said.

Not only is Williams confident that a market is ready and waiting for 4 inch InP wafers - Nikko Materials has recently doubled its manufacturing capability purely to meet the demand for 4 inch wafers - he is also certain that LEC is the right growth technique to tackle this technology.

Boule makers that use LEC typically grow their boules under pressure in order to maintain stoichiometry, but steep temperature gradients often occur that lead to crystal defects. Williams says that by using phosphorous control LEC, the company can manage the temperature gradients and reproducibly make 4 inch InP wafers that have improved dislocation densities.

So if defects have not proved to be a problem for Nikko, then what has? Williams says that the main challenge the company has experienced moving from 3 to 4 inch wafers has been equipment scaling and also polishing the more fragile wafers. "But the main reason we haven't simply jumped from 2 inch to 4 inch, and won't jump from 4 inch to 6 inch, is demand and whether people are willing to pay the cost," he added.

So while Williams firmly believes that the future of LEC for 4 inch InP wafers is bright, what of the rival growth process VGF? UK-based Wafer Technology, the substrate manufacturing arm of UK epiwafer supplier IQE, has chosen to concentrate on VGF for its GaAs manufacturing and is now investigating the technique for 4 inch InP. US-based AXT also manufactures InP(Fe) 4 inch wafers via VGF.

VGF InP wafers have only recently become commercially available, but Ian Grant, technical director at Wafer Technology, believes that wafers grown in this way could become the market leaders. "I think that the VGF method could dominate because it produces crystals with reproducible properties and optimizes crystal quality," he said. "This is a prime requirement for the materials and VGF is already dominating in GaAs."

But while VGF-grown boules are relatively free from stress-related defects such as dislocations, they are historically plagued by twin formation as the crystal diameter expands from the seed to the size of the cylinder in which it is being grown (see figure 3). Grant says, however, that optimizing the angle at which the crystal is grown out of the cylinder is one approach that solves this problem.

Grant adds that crystal quality is not the only consideration, and that cost of production is also an important factor. "For LEC growth the dislocation density is higher, but there is a trade-off between material quality and cost," he said. "There is a potential for LEC to have lower production costs, but if the key is to achieve material specifications, with cost being less critical, then VGF will have the advantage."

Grant is however a little skeptical about the demand for these wafers in today's economic climate. "There was an increase in the demand for these wafers, but I think it then collapsed because of the economic downturn," he said. "There is increased activity in the use of InP for higher performance devices though, so this is a temporary setback. In terms of a large-scale change (from GaAs to InP) this isn't happening yet."

But despite market conditions, Grant believes that LEC- and VGF-grown 4 inch InP wafers will be able to take advantage of the 4 inch fabs that are already established for GaAs wafers. "Four inch InP substrates for microwave ICs will lead the uptake in volume," he explained. "This will happen on the back of GaAs experience, which is conveniently timed because GaAs in the larger capacity fabs has moved to 6 inch and therefore freed up 4 inch capacity."

The future is 6 inch

InP 4 inch wafers are not the only technology on the minds of the industry's leading substrate manufacturers; 6 inch wafers are also in the pipeline.

Grant says that scaling up to 6 inch wafers should not be a problem, but that meeting the required specifications could prove to be more troublesome. "It would be difficult to have bulk properties that are competitive with existing materials," he said. "Generally, as you go to larger sizes, dislocation densities increase."

Grant believes that delivering 6 inch wafers also depends on market conditions and who will take the risk first. "There was a 10 year lag between 4 and 6 inch GaAs wafers," he said. "This may well happen faster with InP, but people need to take a lead in the development of 6 inch substrates."

Kurt Williams of Nikko Materials has said that 6 inch InP wafers are "in the works" for his company, but he is reluctant to commit to a timescale.

However, it would seem that Showa Denko KK (SDK), the semiconductor business of Japanese technology company Showa Denko, has decided to take a gamble. The company has recently started shipping sample volumes of its 6 inch semi-insulating InP wafer, which is manufactured by the company's propriety "hot wall" LEC technique. SDK is now planning to make 500 wafers a month by the end of the third quarter this year. Without a doubt InP substrate manufacturers and IC companies worldwide will all be following their plans avidly.

All from www.compoundsemiconductor.net