Advances in mobile communications will fundamentally depen on two key components: digital signal processing (DSP) and data converters. Using nanometer scale technologies, it is possible to integrate millions of transistors into a processor; concurrently, progress in algorithms and coding have allowed the incorporation of the necessary software functions into these chips enabling them to process information at increasingly higher speeds.
Analog-digital interfaces must track the DSP trends. As a result, these interfaces are now being pushed closer to the sensor/antenna component of receiving and transmitting systems favoring early conversion into the digital domain after signal reception. The advantage of ealy conversion is that it minimizes the amount of analog hardware and increases functionality and reconfigurability through the use of software in the DSP sections. Such flexibility will permit the use of multiple standards, modes and functions through a simple change in software. However, early conversion imposes very stringent speed and resolution requirements on data converters. Future communication technologies such as software radio, smart antennas, and all-digital receivers can only be enabled using an early conversion architechture. Thus, ultra-high speed data convertoers are now being seen as the Holy Grail for future communication systems. unfortunately, data conversion as required by these applicatoins, necessitate speeds and resolutions that connot be met by standard silicon CMOS technology.
Indium phosphide (InP) has emerged in the past decade as the material of choice for the farication of ultra-high speed transistors. Due to higher electron mobility and electron saturation velocity, circuits fabricated using InP-based transistors have exhibited higher speeds and lower power consumptions than their silicon analogues. In particular, the InP-based heterojunction bipolar transistor (HBT) has been recongnized as the fastest operating transistor with a unity current gain cutoff frequency (ft) which is typically higher than 200GHz.
As a result, InP HBT has recently emerged as the prime transistor technology candidate for the implementation of fast data converters. However, several technical obstacles must be surmounted before such implementation becomes realizable. First the development of a reliable high transistor count process must be established. III-V based technologies have suffered from benefits of Moore's Law. In addition, the process must be coupled to an aggressive design methodology that accounts for parasitics and enforces signal integrity at the required high frequencies of operation.

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