最佳负载阻抗 + Load-pull 2008-06-30
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The following methods to determine the optimum load impedance were considered:
(1). The use of the so-called Cripps method.
This method uses a simplified model of the transistor, which can be obtained from small-signal S-parameter measurements at the bias point of interest and knowledge of the DC IV curves. With the help of this information it is possible to construct load-pull contours and the optimum load impedance can be determined. The Cripps method was not used because of the following limitations:
A. The DC IV curves are not always similar to the AC IV curves;
B. Other essential information for the high-power amplifier design is missing e.g. the input impedance of the transistor under large-signal conditions when it is loaded with the optimum load impedance;
C. Modeling of the external part of a transistor with only the drain to source capacitance is too simplistic. Certainly for large transistors, as it is the case for the high-power amplifiers, the influence of the drain-source resistance and the parasitic inductances on the external optimum impedance can no longer be neglected. However, if no large-signal transistor model or load-pull measurement set-up is available it can give a reasonable estimation of the optimum load impedance.
(2). The use of load-pull simulations performed with the help of the large-signal transistor model and the contour test bench available in the Agilent Series IV simulation software.
Comparison with load-pull measurements shows, that the transistor model will give a good estimation of the location of the optimum load impedance in the case of maximum output power. This becomes more difficult if an optimum load impedance for maximum power added efficiency is searched. This is due to the overestimation of the drain current by the transistor model.
(3). The use of load-pull measurements is still the preferred method to determine the optimum load impedance.
When this type of measurements is performed, information becomes available regarding the load impedance of the interstage-matching network.
The load impedance, which must be presented at the output of the transistors, is dependent on the input power. Under small-signal conditions, the optimum load impedance for maximum output power, PAE and power gain is the same. The load that is found for this case is the conjugated of the output impedence of the transistor when the input is simultaneously conjugated matched with the source impedance. When the input power is increased, the real part of the load impeance starts to change from Rds to a load that will guarantee maximum voltage and current swing. Under these non-linear conditions the optimum load for maximum output power and the one for maximum PAE are unequal. For a number of amplifiers, a compromise between these two impedance is used. The results show that the real part of the load for maximum PAE is higher than the one for maximum output power. The load for maximum output power is almost constant as a function of compression level. This is as expected not the case for the maximum efficiency load.
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上次load-pull测试出现的奇怪情况:6GHz下Zopt为容性,现在似乎找到了比较可信的解释。小信号状态下的Zopt有别于大信号下的Zopt,但是大信号下P1dB、最大线性功率和饱和功率所对应的Zopt是统一的,所以在load-pull测试中,可以以这三个指标的任意一个作为标准。还想再做一次load-pull,可是GPIB转USB接口卡悬而未决,还得等待几天。
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又一次高考成绩揭晓,几家欢喜几家愁,命运不济的人真是可怜。想成就任何一件事情,都需要各种各样的主客观条件齐备,一块无法弥补的短板将永远给你一只漏桶。无话可说。
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周末在地质所打篮球。好久没有玩了,跑起来气喘吁吁,不过手感和技术还没有丢,呵呵。另外,持续一年多的健身效果显现:当我带球突破的时候防守人员纷纷退后,然后被冠以“超音速推土机”。可惜球场太硬,又穿了一双鞋底很厚的卡特,所以脚踝受不了。完事之后和地质所的哥们说起两边关于二号楼的纠纷,嘿嘿,管我X事,我是来打篮球的。
