1 基于FPGA上PowerPC处理器的视频处理的实现_1

1.1    基于FPGA的视频输入输出模块的实现

最近研究的题目是基于FPGA的嵌入式多媒体系统设计，目前实现 的功能是挂于PLB总线上的cam模块可以完成摄像头视频信号采集，ycbcr2rgb的转换实现以 及VGA的输出实现。这个模块同时还有一个ram模块，可以暂时存放一帧的图 像，以供后期软件的处理。

       目前视频的分辨率为176*144。

1.1.1    Video capture参考实例

 在项 目开始之初，自己参考了video capture的实例，经过修改，成功将Digilent VDec1, Video Decoder daughter Card 采集的视频信号通过VGA显示出来。Video capture的参考实例实在是太老了，之前都没有很好的跑通，不是出现这个就是出现那个问题，搞的自己很是郁闷。后来还好修改了 一些参数，修改方式如下：――――――――――――――

p. 1.the output is out of range.

solution: first thought: the synchronize signal is wrong.

   Therefore,

   1. checking on the verilog file--"svga_defines"---the file is not involved, so no use.

   2. change the synchronize signal, but infact there is only  one choice for these signal hs=31khz, vs=50hz, due to the input signals. These because the type of the input signal is pal: hs= 16khz, vs=50hz, frame rate =25hz

   3.it can only be displayed on the old screen, not fit to the new ones because the range is 56-76hz for refresh rate.

Change: pal should change to 630 scan lines in total, 525 active lines.... small change on the horizontal.. “reset vertical counting line” should change 33 to 50

    Change “lf_decode.v” to 24 lines in vertical blanking time to detect if it is the pal or ntsc. It seems no influence on the signals are from ntsc or pal.

     Try to ever change the output of the line count, vo, fo, but no actually use.

p.2. how are odd and even fields fit to the vga monitor

solution: first thought, they are stored somewhere, the important maybe the field signal.

   1. search on the field signal

   The signal is read in the "Lf_decode.v", transfer and modify through "vp422_444.v", and finally to generate one short pulse at the falling(or rising) edge of the field signal in the"neg_edge_detector". The signal is used to reset the vertical signal whenever the odd(or even) field is detect.  It seems as the frame sychronize, otherwise the screen is slowly shift downwards.

   2. search on the buffer

     no frame buffer is detected, only the line buffer. So it indicats as they display the same line twice instead of the orignal one, we may get the low resolution picture. But strangely, it is not the case.

    Method: line dupilcate

    In the "line_buffer.v", they read in data at 13khz, read out at 27khz. So the same line can be read for twice, for the same reading time. At the same moment, the other line buffer is witten by the following input line. As every 30us one line is put on the monitor, the same line is put on the second line on the screen(first line of input). Then  the line buffer for the second line input is ready for display in 60us.

   The line is written in the bram. The parameters in that file are no use.

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之后的Video Capture一切正常，可以正常的出图像，而且分辨率很高。自己还做了一个反色的处理，效果也很好。

但是这个参考实例中的视频采集模块没有挂载到总线上，所以软件无法读取图像的数据，也就更本无法进 行软件的算法处理。另外一个不足之处就是它没有将整个图像的一帧数据完整的保存在内存中，而是直接使用了一个缓存，只是进行几个数据的暂存，然后直接抛给VGA显 示了。所以即使把这个参考实例挂载到总线，也还要对其的内部存储这一部分的代码进行修改补充。

1.1.2    挂载到总线上的视频输入 输出模块，并使用软件进行简单的处理

Video Capture，用Kevin的话来说，更多是练手的，而不是真正的进行在其上面开发。之后选择的另外一条道路就是使用挂载到总线上的视频输入输出模块，并在其内部有一个可 以暂存一帧图像的ram，如此一来，就可以使用软件对视频采集的图像进行处理了。

最后的效果如下：

图（1）使用软件的方式，将输入的图片的右下角的局部输出到图像的左上角，可以完成一个局部扣图的实现。

图（2）使用软件方式，实现局部的图像的二值化，其阈值的设定由采集进来的图像的象素值决定，可以很好的 避免光线的影响。