int isp1362_hc_probe(struct isp1362 *isp1362)
{
	int id = 0;
	int tmp = 0;
	
	id = isp1362_read_reg16(isp1362, HC_RD_CHIP_ID_REG);
	if (HC_CHIP_ID != id)
		return -1;
	
	isp1362_write_reg16(isp1362, HC_WR_SCRATCH_REG, 0x55aa);
	tmp = isp1362_read_reg16(isp1362, HC_RD_SCRATCH_REG);
	
	if (0x55aa != tmp)
		return -1;
		
	return 0;	
}
int isp1362_hc_init(struct isp1362 *isp1362)
{
	int tmp = 0;
	hc_reset(isp1362);
	
	hc_set_istl_buff_size(isp1362, 0x400);
	hc_set_intl_buff_size(isp1362, 0x200);
	hc_set_atl_buff_size(isp1362, 0x400);
	
	hc_set_atl_blk_size(isp1362, 0x40);
	
	isp1362_write_reg16(isp1362, HC_WR_CTRL_REG, 0x0680);//0x801f0780
	
	isp1362_write_reg32(isp1362, HC_WR_FRM_INT_REG, 0x27782edf);
	
	isp1362_write_reg32(isp1362, HC_WR_RH_DTA_REG, 0x80000102);//0x05000b01//
	isp1362_write_reg32(isp1362, HC_WR_RH_DTB_REG, 0x00000000);//0x00060000
	
	isp1362_write_reg32(isp1362, HC_WR_RH_PSTAT2_REG, 0x00000100);//reset root hub
	tmp = isp1362_read_reg32(isp1362, HC_RD_RH_PSTAT2_REG);
	
	isp1362_write_reg32(isp1362, HC_WR_RH_PSTAT2_REG, 0x00000002);//0x801f0169
	
	tmp = isp1362_read_reg32(isp1362, HC_RD_RH_PSTAT2_REG);
}