AD9851程序—控制字
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发表于 6/6/2012 9:25:45 PM
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entity dds is
--generic(mul_32:std_logic_vector(31 downto 0):="10101011110011000111011100010001");
Port ( clk : in STD_LOGIC; --系统时钟
-- reset : in std_logic;
-- channel : in std_logic_vector(1 downto 0); --输入频率值切换分别为:一般,输入最小值,输入步进,输入最大值
-- fre_data: in std_logic_vector(25 downto 0); --输入26位频率值
dds_wclk: out std_logic; --输出控制时钟信?
dds_fqud: buffer std_logic; --输出控制频率转换信?
dds_data: out std_logic_vector( 7 downto 0); --DDS八位数据端口
dds_reset:out std_logic:='0'); --DDS复位信号
end dds;
architecture Behavioral of dds is
SIGNAL clkdiv : std_logic:='0'; ---分频后时钟
signal data_reg: std_logic_vector(39 downto 0); --40位控制字寄存器
signal stat:std_logic_vector(3 downto 0):="0000";
-- signal add_data:std_logic_vector(25 downto 0); --频率增量
-- signal dds_data_max:std_logic_vector(25 downto 0); --频率最大扫描范围
-- signal dds_data_min:std_logic_vector(25 downto 0); --频率最小扫描范围
signal dds_datain:std_logic_vector(25 downto 0); --输出频率值:
signal dds_data_32:std_logic_vector(31 downto 0); --输出频率值的控制字
-------------------------------------------------------------------------------
--控制字转换函数,将26位输入频率值转换为32位频率控制字
-------------------------------------------------------------------------------
function mul26_to32(data:std_logic_vector)
return std_logic_vector is
variable mul_full58:std_logic_vector(57 downto 0);
variable phase_32:std_logic_vector(31 downto 0);
begin
mul_full58:=data * "10101011110011000111011100010001";
---------"10101011110011000111011100010001"频率控制字公式计算中间值
phase_32:=mul_full58(57 downto 26);
return phase_32;
end mul26_to32;
-----------------------------------------------------------------------------------------
begin
dds_datain<="00100110001001011010000000";
dds_data_32<=mul26_to32(dds_datain); --调用函数,豢刂谱?
data_reg(39 downto 0)<="00000000" & dds_data_32(31 downto 0);
------------------------------------------------------------------------------------------
-- process (reset,channel,fre_data)
-- begin
-- if reset='1' then --全扫描,频率范围300~10M,步进:10K
-- dds_data_min<="00000000000000000100101100";
-- add_data<="00000000000000001111101000";
-- dds_data_max<="00100110001001011010000000";
-- else
-- case channel is
-- when "00"=> dds_data_min<=fre_data; --输入频率值下限
-- when "01"=> dds_data_max<=fre_data; --输入德手瞪舷?
-- when "10"=> add_data<=fre_data; --输入频率值步进
-- when others => null;
-- end case;
-- end if;
-- end process;
--------------------------------------------------------------------------------------
PROCESS (clk)------------------------------n1分频
variable n1:integer range 0 to 16;
BEGIN
IF (clk' event AND clk='1') THEN
IF (n1 = 16) THEN
n1 := 0;
clkdiv <=NOT clkdiv;
ELSE
n1 := n1 + 1;
END IF;
END IF;
END PROCESS;
------------------------------------------------------------------------------------
PROCESS(clkdiv)
variable count:integer range 0 to 1000; ---控制延时时间
BEGIN
IF clkdiv'EVENT AND clkdiv='1' THEN
case stat is
when "0000"=>dds_reset<='1'; stat<="0001"; --复位操作
when "0001"=>dds_reset<='0'; dds_fqud<='0'; dds_wclk<='0'; stat<="0010";
--初始化DDS,以下为写频率控制字-----------------------------------------
when "0010"=>dds_data<=data_reg(39 DOWNTO 32); dds_wclk<='0'; STAT<="0011";
when "0011"=>dds_wclk<='1'; STAT<="0100"; --上升沿写入刂谱郑甙宋幌辔豢刂谱? when "0100"=>dds_data<=data_reg(31 DOWNTO 24); dds_wclk<='0'; STAT<="0101";
when "0101"=>dds_wclk<='1'; STAT<="0110"; --依次将32位频率控制字写入
when "0110"=>dds_data<=data_reg(23 DOWNTO 16); dds_wclk<='0'; STAT<="0111";
when "0111"=>dds_wclk<='1'; STAT<="1000";
when "1000"=>dds_data<=data_reg(15 DOWNTO 8); dds_wclk<='0'; STAT<="1001";
when "1001"=>dds_wclk<='1'; STAT<="1010";
when "1010"=>dds_data<=data_reg(7 DOWNTO 0); dds_wclk<='0'; STAT<="1011";
when "1011"=>dds_wclk<='1'; STAT<="1100";
when "1100"=>dds_wclk<='0';dds_fqud<='1'; STAT<="1101";
--控制字写入,FQUD上升沿所存到DDS中-------------------------------------
when "1101"=>dds_fqud<='0';count:=count+1; --频率转换间的延时,COUNT个时钟
if (count=1000) then count:=0; STAT<="0010";
else null; end if;
when others=>null;
end case;
END IF;
END PROCESS;
-------------------------------------------------------------------------------------
--控制扫频范围在300HZ~50M之?
-- process(dds_fqud)
-- begin
-- if dds_fqud'event and dds_fqud='1' then
-- if dds_datain > dds_data_max then --输出频率值最大限度,设9850时钟德?00M
-- dds_datain<=dds_data_min; --赋值频率最小范围
-- else
-- dds_datain<=dds_datain+add_data;
-- end if;
-- end if;
-- end process;
------------------------------------------------------------------------------------------
end Behavioral;
