Worst Case Analysis：[Worst Case Extreme Value Analysis (EVA)]

最坏分析其实就是极端值分析


Benefits From WCCA

好处很多拉，其实一句话，就是让你知道怎么样才会出问题。

Assure acceptable operation throughout the entire product life cycle under the most unfavorable combination of anticipated conditions
Define Critical Components and Spec. Control Drawing (SCD) Limits
Provide Acceptance Test Procedure (ATP) Limits
Define Need for and Range of Select-At-Test (SAT) components
Improve Reliability through Parts Stress and Derating analysis
Identify design concerns which during test, alignment, and use could result in circuit damage or premature degradation.

WCCA helps ensure increased product reliability. We accomplish this through rigorous mathematical and simulation-based models along with hardware correlation. Correlated models are then used to determine part stress margins, and EOL/BOL product operating specifications. A single over-stressed component can cost your company millions of dollars. A thorough Worst Case Analysis can eliminate this from happening.




Background & Definition

A Worst Case Circuit Analysis is a quantitative assessment of the equipment performance, accounting for manufacturing, environmental and aging effects. In addition to a circuit analysis, a WCCA often includes stress and derating analysis, Failure Modes and Effects Criticality (FMECA) and Reliability Prediction (MTBF).

The specific objective is to verify that the design is robust enough to provide operation which meets the system performance specification over design life under worst case conditions and tolerances (initial, aging, radiation, temperature, etc.).


一般我们做的比较多的就是stress和derating，这个最直观也最明显了。
The Stress and Derating Analysis is intended to increase reliability by providing sufficient margin compared to the allowable stress limits. This reduces overstress conditions that may induce failure, and reduces the rate of stress-induced parameter change over life. It determines the maximum applied stress to each component in the system.

Methodology

A WCCA follows this general form:
Generate/Obtain circuit model
Obtain Correlation to validate model

Determine sensitivity to each component parameter

Determine component tolerances

Calculate the variance of each component parameter as sensitivity times absolute tolerance

Use at least two methods of analysis (eg. hand analysis and SPICE or Saber, SPICE and measured data) to assure the result

Generate a formal report to convey the information produced

自己列公式+Pspice+测试数据，选两个对照一下罗


The design is broken down into the appropriate functional sections. A mathematical model of the circuit is developed and the effects of various part/system tolerances (see below) are applied. The circuit's EVA and RSS results are determined for Beginning-of-Life and End-of-Life states.

Two methods of analysis and/or hardware correlation are always used to confirm results.

These results are used to calculate part stresses and are applied to other analyses. In order for the WCCA to be useful throughout the product’s life cycle, it is extremely important that the analysis be documented in a clear and concise format. This will allow for future updates and review by other than the original designer. A compliance matrix is generated that clearly identifies the results and all issues.


Factors Addressed During WCCA

Analog Circuit Analysis

Some of the factors to be considered during analysis include:
Maximum line voltage variations and line transients （电源电压和暂态脉冲）
Maximum input and output variation （输入输出变化）
Maximum part parameter variation 元件参数变化
Maximum performance demands and variations 性能需求
Maximum and minimum environmental conditions （环境条件）
Fail-safe provisions （失效还是安全的，高可靠性的必备条件）
Redundancy provisions
Radiation effects, as applicable （辐射效应-一般用于太空拉）
Parameter drift due to aging （参数老化）
Transients due to turn-on, turn-off, and state changes （开关和状态变化引起暂态）
Fatigue due to cyclical loading and temperature cycling （周期性负载和温度循环）
Interface conditions between modules and modules to test equipment （模块间接口）

Digital Circuit Analysis

Digital circuit worst case analyses involves one or more of the following:
Timing Margin Analysis
Transmission Line Effects 传输线效应
Noise Due to Crosstalk and Grounding 串扰
Meta-Stability Analysis
Decoupling Analysis 解耦分析
Fanout Analysis 扇出分析—驱动能力
Logic Compatibility/Interface Analysis 逻辑功能
Supply Power Application and Sequencing Analysis.
State Machine Analysis 状态机
Unused/Tri-stated Input Analysis
No Connection Analysis
Test Point Current Limiter Analysis
Physical Layout Analysis
One-Shot Margin Analysis


Component Tolerances

Initial 初始误差
Temperature and Environmental Factors 温度和环境效应
Radiation 辐射
Aging or End-of-Life Factors 老化